1. Field of the Invention
This invention relates to PAL system chrominance signal processing circuits and more particularly to a PAL system chrominance signal processing circuit whereby the color picture quality is prevented from being compromised.
2. Description of the Related Art
In a PAL system chrominance signal processing circuit, the R-Y signal component of the input carrier chrominance signal is inverted in phase and the phase distortion has been corrected by adding and subtracting the carrier chrominance signal and the signal passed through one horizontal period delaying line (1H delaying line).
FIG. 4 is a block diagram showing a conventional PAL system chrominance signal processing circuit.
In FIG. 4, a color information signal including a carrier chrominance signal and color burst signal is led to an input terminal 50. The color information signal led to the input terminal 50 is fed to a band-pass amplifier 51 and burst gate circuit 60.
The band-pass amplifier 51 amplifies the carrier chrominance signal included in the color information signal and takes out the carrier chrominance signal. Here in the PAL system carrier chrominance signal, if the phase of the B-Y signal component is 0 degree, the phase of the R-Y signal component will be switched to 90 degrees and -90 degrees on each scanning line. The carrier chrominance signal output from the band-pass amplifier 51 is fed directly to the first input terminal of a PAL matrix circuit 52 and is fed to the second input terminal of the PAL matrix circuit 52 through a 1H delaying circuit 53. The PAL matrix circuit 52 cancels the phase distortion in the B-Y signal component by adding the direct carrier chrominance signal from the band-pass amplifier 51 and the carrier chrominance signal delayed by 1H by the 1H delaying circuit 53, feeding the B-Y signal component to a B-Y synchronizing detecting circuit 54, and cancelling the phase distortion in the R-Y signal component by subtracting the 1H delayed carrier chrominance signal from the direct carrier chrominance signal and feeds the R-Y signal component to an R-Y synchronizing detecting circuit 55.
On the other hand, the burst gate circuit 60 takes the color burst signal out of the color information signal in response to the burst extracting pulses from the burst gate pulse generating circuit 61 and feeds it to a voltage controlled oscillator (abbreviated as VCO hereinafter). The VCO 62 is connected to a continuous wave oscillator 63 which generates a continuous wave signal of 4.43361875 MHZ synchronized with the color burst signal. The VCO 62 detects the phase difference between the above mentioned continuous wave signal and color burst signal. The oscillating frequency is controlled by the voltage obtained by integrating the detected output and the continuous wave oscillator 63 is driven. The continuous wave of 4.43361875 MHZ from the continuous wave oscillator 63 is fed as a reference sub-carrier respectively to the VCO 62, phase shifter 64 and PAL switch phase shifter 65 from the first to third output terminals. The phase shifter 64 shifts by 90 degrees the phase of the color sub-carrier and feeds it to the B-Y synchronizing detecting circuit 54. The PAL switch phase shifter 65 shifts the phase of the reference sub-carrier by switching it to 0 degree and 180 degrees in each 1H period and feeds it to the R-Y synchronizing detecting circuit 55. The B-Y synchronizing detecting circuit 54 detects the B-Y signal component with the reference sub-carrier of a phase shifted by 90 degrees to make the B-Y signal and leads it out to an output terminal 56. The R-Y synchronizing detecting circuit 55 detects the R-Y signal component with the reference sub-carrier of a phase shifted to 0 degree and 180 degrees in each 1H period to make the R-Y signal and leads it out to an output terminal 57.
FIG. 5 is a vector diagram showing the carrier chrominance signal fed to the PAL system chrominance signal processing circuit in FIG. 4.
In FIG. 5, the vectors of the n-th, n+2-th, . . . scanning lines become An, An+2, . . . and the vectors of the n+1-th, n+3-th, . . . scanning lines become An+1, An+3, . . . , because, if the phase of the B-Y signal component is 0 degree, the phase of the R-Y signal component will be inverted to 90 degrees and -90 degrees in each 1H period. Here, the R-Y synchronizing detecting circuit 55 detects the n-th, n+2-th, . . . scanning lines with the reference sub-carrier of a phase of 90 degrees and detects the n+1-th, n+3-th, . . . scanning lines with the reference sub-carrier of a phase of -90 degrees to arrange the phase of the output R-Y signal. The B-Y synchronizing detecting circuit 54 detects the n-th, n+1-th, n+2-th, n+3-th, . . . scanning lines with the reference sub-carrier of a phase of 0 degree to conform the phase of the B-Y signal to that of the R-Y signal.
FIG. 6 is an explanatory view showing the correction of a phase distortion of a transmitting system by the PAL system chrominance signal processing circuit in FIG. 4.
In FIG. 6, An represents the vector of the normal carrier chrominance signal on the n-th scanning line and An+1 represents the vector of the normal carrier chrominance signal on the n+1-th scanning line. The vectors An and An+1 are substantially linearly symmetrical with each other with respect to the R-Y axis due to the line correlativity. On the other hand, the phase of the color burst signal on the n-th scanning line is +135 degrees and the phase of the color burst signal on the n+1-th scanning line is -135 degrees.
Here, if the carrier chrominance signals on the n-th and n+1-th scanning lines are distorted in the phase by .alpha. degrees, the vectors An and An+1 of the carrier chrominance signals will be respectively rotated by .alpha. degrees to be vectors Bn and Bn+1.
Here, if the vector Cn+1 obtained by inverting the vector Bn+1 in the phase with respect to the R-Y axis is added to the vector Bn and the sum is made 1/2, a vector (cos .alpha.) An will be obtained.
Thus, in the conventional PAL system chrominance signal processing circuit, the phase distortion by the transmitting system is corrected. However, in the PAL system chrominance signal processing circuit, the B-Y signal and R-Y signal are made by directly adding or subtracting the carrier chrominance signal having passed through the 1H delaying circuit 53. In such case, as the 1H delaying circuit 53 is formed of a glass delaying device or charge coupling device, the carrier chrominance signal passing through the 1H delaying circuit will be influenced by the S/N reduction, color distortion and color saturation degree fluctuation by the reflection and insertion loss of the 1H delaying circuit 53 and will be influenced by the phase distortion on each scanning line by the instability of the filter characteristic of the carrier chrominance signal from the input terminal 51 and carrier chrominance signal delayed by 1H by the 1H delaying circuit 53 in the signal processing in the PAL matrix circuit 52. For such reasons, the color picture quality of the R-Y signal output from the PAL system chrominance signal processing circuit is reduced.